Digital communications systems are useful in a variety of complex control systems, for example, automatic control systems for controlling military aircraft which require `fly-by-wire` systems in order to enable them to be flown. The need, in this and other areas of application, to handle large quantities of data, in real time, and with great reliability, has fuelled the development of such systems.
Early digital computing systems operated on the basis of software programs stored in memory devices. This approach meant that they were easy to program; and digital system development continued to follow the accepted "school of thought", that of using a `Von Neumann Architecture` based on a Central Processing Unit (CPU), which executed the whole software task sequentially. It became apparent however that, with high data throughput requirements, a `bottleneck` was being thereby created due to the CPU's inability to execute more than one instruction at a time. This restricted the digital computer's ability to cope with increasingly complex tasks designed to be executed within a given time constraint, so restricting its ability to achieve desired system control performance.
Until recently microprocessors were slow and the complexity of the control task meant that complex software executives had to be incorporated within each program in order that acceptable data throughput times could be achieved to obtain the system performances required. These software executive structures were complex and time consuming to produce.
Synchronisation of data throughput between control lines included assigning cross consolidation techniques prior to each control task being executed. Synchronisation allowed exchange of parameters between lines at exactly the time they were required. This removed the problem of time skew occurring and so eased the task of cross consolidation. However, the voter monitor software, designed to increase reliability by taking the votes of a plurality of outputs before executing action based on those outputs, and which must therefore be executed before the control law algorithm, resulted in a significant hardware overhead if the overall iteration rate was to be adequately fast.
Thus, apart from the considerable task of producing an executive structure, which keeps all processors across four lines of a control system synchronised, there was also a significant hardware overhead. Synchronous systems required the use of special hardware modules which were used to execute specific functions. Although each module was able to perform its function efficiently, when dissimilar designs of modules were integrated together in a single unit, the task of software and hardware debugging became much more complex. Whilst the hardware proliferation made the overall computer system more capable, it also resulted in higher design, development and manufacturing costs.
The synchronisation of microprocessors also leads to an increased probability of common mode failure between lines. The complexity of both the hardware and software design leads to an increased probability of a degradation in synchronisation between processors due to a single software bug or hardware failure.
In summary, a synchronous serial (single processor) system has the advantage of eliminating time skew problems but has the disadvantages of slow data throughput, complex software executives, increased probability of common mode failure and increased hardware overheads.
An alternative concept of an Asynchronous Multi Processor System (AMPS) has been developed which is intended to provide a cost effective solution, particularly in the design of active flight control computers for aircraft and which overcomes many of the difficulties described above. Such a concept is disclosed in published European Patent Application 0200352.
The AMPS concept relies on a number of identical processing modules, running in parallel with one another but asynchronously. The asynchronous processing enables any processor to perform its control task at the maximum possible rate. The latest (i.e. the most recent data) will be stored as a variable which can be accessed at any time by another asynchronous processor. There are thus no processor `wait` states associated with the transfer of data between modules. Data throughput is accordingly increased to a rate much higher than the minimum acceptable level for future unstable aircraft.
The principal of asynchronous processors working in parallel also eliminates the need for complex executive functions. Processing modules iterate their own control task at the maximum rate, sampling and outputting data in a totally autonomous way. The need for an executive to schedule the order in which the control tasks are implemented, in order to achieve high throughput times, is eliminated. The advantage of this is twofold:
a) In synchronous systems the executive required to implement control software is becoming highly complex. This not only incurs high software overheads, it also increases the processing cycle time for each computing module. To reduce this total cycle time, the executive software becomes more complex and the software unit costs then far outweigh those of hardware. By comparison the executive overhead in a computer system based on the AMPS concept will be very much reduced.
b) As the executive software becomes more complex, the integrity of the control system is reduced. The AMPS architecture will consequently possess a higher integrity software, as well as a high integrity hardware structure.
Time skew occurs in asynchronous systems because the input signal sampling occurs at different instants in time for each processor. Present day microprocessors are fast enough to sample and process data in a short iteration time, such that time skew is minimal and therefore degradation of the control output is no longer acute.
In an AMPS network, computing modules are standardised to ease fault hardware inspection as well as reduce design, development and manufacturing costs.
This modularity of the AMPS architecture will enable future Very Large Scale Integration (VLSI) microprocessors to be readily incorporated into the system. For enhanced performance, a thirty-two bit microprocessor can be adopted, but a choice exists between the latest commercially available devices and a custom design. The option selected will depend on the future control law, voter monitor task and the iteration rates that must be achieved.
The key part of the AMPS architecture is a modular computer card or General Computing Module (GCM) which contains serial communications devices to which VLSI techniques can be applied.